This application claims priority to an application entitled xe2x80x9cAFC Circuit and Method Thereof in Dual-Mode Terminalxe2x80x9d filed in the Korean Industrial Property Office on Sep. 2, 1998 and assigned Ser. No. 98-36023, the contents of which are hereby incorporated by reference.
1. Field of the Invention
The present invention relates generally to a device and method for controlling the reception frequencies in a terminal in a mobile communication system, and in particular, to a AFC (Automatic Frequency Control) device and method of a dual-mode terminal.
2. Description of the Related Art
Data is generally transmitted by a terminal in a mobile communication system in an FDD (Frequency Division Duplexer) scheme or a TDD (Time Division Duplexer) scheme. The next-generation mobile communication system considers implementing a dual-mode terminal with the advantages of the two schemes. Since the dual-mode terminal uses different frequency bands, it requires oscillators for generating the different frequencies and thus the design of an AFC (Automatic Frequency Controller) for the oscillators is increasingly important. It is difficult to apply different feed-back loops to the two oscillators in a conventional terminal during a synchronization acquisition of different frequencies.
FIG. 1 is a block diagram of an AFC device in a receiver of a dual-mode terminal. Referring to FIG. 1, a mixer 111 mixes an input signal RX with an oscillation frequency received from a first voltage-controlled oscillator (VCO1) 119 and outputs a first mixed signal Fcl. A low-pass filter (LPF) 113 low-pass filters the output of the mixer 111. The output of the LPF 113 is the amplitude A1 of the input signal. An analog-to-digital (A/D) converter 115 converts the output of the LPF 113 to digital data q_a bits. A mixer 131 mixes the input signal RX with an oscillation frequency received from a second voltage-controlled oscillator (VCO2) 139 and outputs a second mixed signal Fc2. A LPF 133 low-pass filters the signal received from the mixer 131. The output of the LPF 133 is the amplitude A2 of the input signal. An A/D converter 135 converts the output of the LPF 133 to digital data q_b bits.
An AFC 151 receives the digital data from the A/D converters 115 and 135 and generates a signal (RX main clock) for automatically controlling a reception frequency. A TCXO (Temperature Compensated Crystal Oscillator) 153 multiplies the output of the AFC 151 to generate an intended RF (Radio Frequency)/IF (Intermediate Frequency). A Phase Locked Loop (PLL1) 117 generates a control signal for generating a phase-locked frequency according to the multiplied signal received from the TCXO 153. The oscillator VCO1 119 generates the frequency set under the control of the PLL1 117 and applies the frequency to the mixer 111. PLL2 137 generates a control signal for generating a phase-locked frequency according to the multiplied signal received from the TCXO 153. The oscillator VCO2 139 generates the frequency set under the control of the PLL2 137 and applies the frequency to the mixer 131. A Base Band Analog (BBA) circuit 155 generates a sampling clock for the A/D converter 115 in response to the output of the TCXO 153. A BBA circuit 157 generates a sampling clock for the A/D converter 135 in response to the output of the TCXO 153.
The oscillators generate different frequencies through the PLLs in the receiving AFC device of the dual-mode terminal as constructed above.
Application of the above conventional AFC device to a dual-mode transmission scheme has the following problems. The dual-mode terminal has different RFs/IFs and employs the AFC device to stabilize each oscillator when a mode transitions to a different frequency band. Here, the AFC device operates to acquire a frequency offset. To do so, it operates a feed-back loop within the range of the amount of residual frequency jitter enough to ensure the demodulation performance at the receiving end, to thereby achieve stable performance. However, it takes a long time to establish a stabilized path by operating the feed-back loop at a mode transition, resulting in the increase of time required to ensure the demodulation performance. As shown in FIG. 1, in the case that different IFs/RFs should be multiplied by one TCXO and controlled by different PLLs, a different control dynamic range is set for each loop. Therefore, the amount of jitter in the phase noise error of each VCO output is different when controlling two different VCOs, thereby decreasing the demodulation performance of the receiver.
FIG. 2 is a graph illustrating the unequal dynamic range characteristics of the receiving AFC device in the dual-mode terminal. Referring to FIG. 2, reference numerals 222 and 224 denote two frequency slopes F1_step/V_step and F2step/V_step of the TCXO 153. Reference numerals 226 and 228 denote the dynamic ranges of the first and second mixed signals Fc1 and Fc2, respectively. Reference numeral 230 denotes the phase-noise margin of the frequencies output from the TCXO 153. As shown in FIG. 2, due to use of the TCXO 153 in the AFC device of the conventional dual-mode terminal, the AFC 151 has different control voltage to frequency transform dynamic ranges. Hence, a TCXO that exhibits different slopes, as shown in FIG. 2, is required but difficult to design.
As described above, the receiving AFC device of the conventional dual-mode terminal has the problem that either a different operation should be executed at each mode or the frequency error tracking time is extended by use of a single AFC device. Another problem is that in the case of using one TCXO having a reference frequency for controlling two RFs/IFs, the dynamic ranges of the phase noise output with respect to the outputs of the two VCOs are different because of the residual phase noise of the TCXO, thereby decreasing the demodulation performance at the receiving end.
It is, therefore, an object of the present invention to provide an automatic frequency control device and method of controlling reception frequency in a dual-mode terminal, which can stabilize frequency characteristics to increase demodulation performance.
It is another object of the present invention to provide an automatic frequency control device and method of controlling reception frequency in a dual-mode terminal, which can vary the quantization level of digitized data to improve linear frequency transform characteristics.
It is a further object of the present invention to provide an automatic frequency control device and method of controlling reception frequency in a dual-mode terminal, which introduces a forward common phase error compensation scheme to increase demodulation performance.
To achieve the above and other objects, there is provided an AFC device in a dual-mode terminal. According to one embodiment of the present invention, the AFC device includes a first IF generator having a first frequency oscillator, for generating a first IF by mixing a first input signal with a first oscillation frequency. In the AFC device, a first A/D converter receives a first quantization step value, allocates quantization bits to obtain a first linear characteristic, and then converts the first IF to digital data. A second IF generator has a second frequency oscillator, and generates a second IF by mixing a second input signal with a second oscillation frequency. A second A/D converter receives a second quantization step value, allocates quantization bits to obtain a second linear characteristic, and then converts the second IF to digital data. An automatic frequency controller (AFC) receives the first and second digital data and automatically controls the frequency of a main clock based on the linear characteristics of the two input signals. A multiplier multiplies the clock and applies the multiplied clock to the first and second frequency oscillators.
According to another embodiment of the present invention, the AFC device includes a first IF generator having a first frequency oscillator, for generating a first IF by mixing a first input signal with a first oscillation frequency. A first A/D converter converts the first IF to digital data, a second IF generator has a second frequency oscillator, for generating a second IF by mixing a second input signal with a second oscillation frequency, and a second A/D converter converts the second IF to digital data. An AFC receives the first and second digital data and automatically controls the frequency of the main clock based on the linear characteristics of the two input signals. A first frequency monitor monitors the frequency of the first input signal. A multiplier receives a clock signal and the outputs of the first frequency monitor and the AFC, multiplies the clock signal, and applies the multiplied clock signal to the first and second frequency oscillators. A Phase Density Spectrum (PDS) monitor receives the first IF and PDS information of the multiplier, and generates a PDS monitoring signal. A phase error estimator estimates the phase error from the outputs of the second A/D converter and the PDS monitor, and a multiplier multiplies the phase error by the output of the second A/D converter to thereby correct the phase error.